IID1

Core Logic ,,'[ $0,+*  PLFURQ &026 *DWH $UUD\ Description IIDx is a family of non-inverting clock drivers with a single output. Logic Symbol Truth Table IIDx AQ AQ AQ LL HH HDL Syntax Verilog .................... IIDx inst_name (Q, A); VHDL...................... inst_name: IIDx port map (Q, A); Pin Loading Pin Name A IID1 1.0 Equivalent Loads ...