TECHNICAL DATA
IN74LV174
Hex D-type flip-flop with reset; positive edge-trigger
The 74LV174 is a low–
voltage Si–gate
CMOS device and is pin and function compatible with the 74HC/HCT174.
The 74LV174 has six edge–triggered D–type flip–flops with individual D inputs and Q outputs.
The common clock (CP) and master reset (MR) inputs load and reset (clear) all flip–flops simultaneously.
The register is fully edge–triggered.
The state of each D input, one set–up time prior to the LOW–to–HIGH clock transition, is transferred to the corresponding output of the flip–flop.
A LOW level on the MR input forces all outputs LOW, independently of clock or data inputs.
The device is useful for applications r...