IS43LR32100C IS46LR32100C
512K x 32Bits x 2Banks Mobile DDR SDRAM
Description
The IS43/46LR32100C is 33,554,432 bits
CMOS Mobile Double Data Rate Synchronous DRAM organized as 2 banks of 524,288 words x 32 bits.
This product uses a double-data-rate architecture to achieve high-speed operation.
The double data rate architecture is essentially a 2N prefetch architecture with an interface designed to transfer two data words per clock cycle at the I/O pins.
This product offers fully synchronous operations referenced to both rising and falling edges of the clock.
The data paths are internally pipelined and 2n-bits prefetched to achieve high bandwidth.
All input and output
voltage levels are comp...