LMA 1009/2009 DEVICES INCORPORATED 12 x 12-bit Multiplier-Accumulator LMA1009/2009 DEVICES INCORPORATED 12 x 12-bit Multiplier-Accumulator DESCRIPTION Data present at the A and B input registers is latched on the rising edges of CLK A and CLK B respectively.
RND, TC, ACC, and SUB controls are latched on the rising edge of the logical OR of CLK A and CLK B.
TC specifies the input as two’s complement (TC HIGH) or unsigned magnitude (TC LOW).
RND, when HIGH, adds ‘1’ to the most significant bit position of the least significant half of the product.
SubThe LMA1009/2009 produces the 24-bit sequent truncation of the 12 least signifiproduct of two 12-bit numbers.
The cant bits produces a result...

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