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Reference Design
LP2996-N, LP2996A
SNOSA40K – NOVEMBER 2002 – REVISED DECEMBER 2016
LP2996-N, LP2996A DDR Termination Regulator
1 Features
•1 Minimum VDDQ: – 1.
8 V (LP2996-N)
– 1.
35 V (LP2996A) • Source and Sink Current • Low Output
Voltage Offset • No External Resistors Required for Setting Output
Voltage • Linear Topology • Suspend to Ram (STR) Functionality • Stable With Ceramic
Capacitors With Appropriate
ESR • Low External Component Count • Thermal Shutdown
2 Applications
• LP2996-N: DDR1 and DDR2 Termination
Voltage • LP2996A: DDR1, DDR2, DDR3, and DDR3L
Termination
Voltage • FPGA • Industrial a...