LP62E16512-I Series
Preliminary
Document Title 512K X 16 BIT LOW
VOLTAGE CMOS SRAM Revision History
Rev.
No.
0.
0
512K X 16 BIT LOW
VOLTAGE CMOS SRAM
History
Initial issue
Issue Date
April 26, 2002
Remark
Preliminary
PRELIMINARY
(April, 2002, Version 0.
0)
AMIC Technology, Inc.
LP62E16512-I Series
Preliminary
Features
n Operating
voltage: 1.
65V to 2.
2V n Access times: 70 ns (max.
) n Current: Very low power version: Operating: 40mA (max.
) Standby: 10µA (max.
) n Full static operation, no clock or refreshing required n All inputs and outputs are directly TTL-compatible n Common I/O using three-state output n Data retention
voltage: 1.
2V (min.
) n Available in 48-ball CSP (8×10mm) packages
...