Part Number
|
M13L32321A |
Manufacturer
|
ESMT |
Description
|
Double Data Rate SDRAM |
Published
|
Sep 20, 2018 |
Detailed Description
|
ESMT
DDR SDRAM
M13L32321A (2G)
512K x 32 Bit x 2 Banks Double Data Rate SDRAM
Features
z Double-data-rate architecture...
|
Datasheet
|
M13L32321A
|
Overview
ESMT
DDR SDRAM
M13L32321A (2G)
512K x 32 Bit x 2 Banks Double Data Rate SDRAM
Features
z Double-data-rate architecture, two data transfers per clock cycle z Bi-directional data strobe (DQS) z Differential clock inputs (CLK and CLK ) z DLL aligns DQ and DQS transition with CLK transition z Two bank operation z CAS Latency : 2, 2.
5, 3 z Burst Type : Sequential and Interleave z Burst Length : 2, 4, 8 z All inputs except data & DM are sampled at the rising edge of the system clock(CLK) z Data I/O transitions on both edges of data strobe (DQS) z DQS is edge-aligned with data for READs; center-aligned with data for WRITEs z Data mask (DM) for write masking only z VDD = 3.
3V ± 0.
3V, VDDQ = 3.
3V ±...
Similar Datasheet