M48T512Y M48T512V
5.
0 or 3.
3 V, 4 Mbit (512 Kbit x 8) TIMEKEEPER® SRAM
Not recommended for new design
Features
■ Integrated ultra low power SRAM, real-time
clock, power-fail control circuit, battery, and
crystal
)■ BCD coded year, month, day, date, hours, t(sminutes, and seconds c■ Automatic power-fail chip deselect and WRITE uprotection rod■ WRITE protect
voltages:
(VPFD = power-fail deselect
voltage)
P– M48T512Y: VCC = 4.
5 to 5.
5 V; te4.
2 V ≤ VPFD ≤ 4.
5 V le– M48T512V: VCC = 3.
0 to 3.
6 V; so2.
7 V ≤ VPFD ≤ 3.
0 V b■ Conventional SRAM operation; unlimited OWRITE cycles -■ Software controlled clock calibration for high t(s)accuracy applications
■ 10 years of data retention and clock opera...