19-2718; Rev 0; 1/03 www.
DataSheet4U.
com 2.
488Gbps/2.
67Gbps 1:4 Demultiplexer with Clock and Data Recovery and Limiting Amplifier General Description The MAX3882 is a deserializer combined with clock and data recovery and limiting amplifier ideal for converting 2.
488Gbps/2.
67Gbps serial data to 4-bit-wide, 622Mbps/667Mbps parallel data for SDH/SONET applications.
The device accepts serial NRZ input data as low as 10mVP-P of 2.
488Gbps/2.
67Gbps and generates four parallel LVDS data outputs at 622Mbps/667Mbps.
Included is an additional high-speed serial data input for system loopback diagnostic testing.
For data acquisition, the MAX3882 does not require an external reference clock.
However, i...

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)