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MAX9320B

1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver

Description

19-2383; Rev 1; 11/03 1:2 Differential PECL/ECL/LVPECL/LVECL Clock and Data Driver General Description The MAX9320B low-skew, 1-to-2 differential driver is designed for clock and data distribution. The input is reproduced at two differential outputs. The differential input can be adapted to accept single-ended inputs by applying an external reference voltag...


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