MOTOROLA SEMICONDUCTOR TECHNICAL DATA Presettable 4-Bit Down Counters The MC14522B BCD counter and the MC14526B binary counter are constructed with MOS P–channel and N–channel enhancement mode devices in a monolithic structure.
These devices are presettable, cascadable, synchronous down counters with a decoded “0” state output for divide–by–N applications.
In single stage applications the “0” output is applied to the Preset Enable input.
The Cascade Feedback input allows cascade divide–by–N operation with no additional gates required.
The Inhibit input allows disabling of the pulse counting function.
Inhibit may also be used as a negative edge clock.
These complementary MOS counters can be...

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