Octal D Flip-Flop with Clock Enable MC74AC377, MC74ACT377 The MC74AC377/74ACT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs.
The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW.
The register is fully edge-triggered.
The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output.
The CE input must be stable only one setup time prior to the LOW-to-HIGH clock transition for predictable operation.
Features • Ideal for Addressable Register Applications • Clock Enable for Address and Data Synchronization Applications • Eight Ed...

Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)