4 MEG x 4 FPM DRAM
DRAM
FEATURES
• Industry-standard x4 pinout, timing, functions, and packages • High-performance, low-power
CMOS silicon-gate process • Single power supply (+3.
3V ±0.
3V or +5V ±0.
5V) • All inputs, outputs and clocks are TTL-compatible • Refresh modes: RAS#-ONLY, HIDDEN and CAS#BEFORE-RAS# (CBR) • Optional self refresh (S) for low-power data retention • 11 row, 11 column addresses (2K refresh) or 12 row, 10 column addresses (4K refresh) • FAST-PAGE-MODE (FPM) access • 5V tolerant inputs and I/Os on 3.
3V devices
MT4LC4M4B1, MT4C4M4B1 MT4LC4M4A1, MT4C4M4A1
For the latest data sheet, please refer to the Micron Web site: www.
micronsemi.
com/mti/msp/html/datasheet.
html
PIN ASSI...