NB7L111M 2.
5V / 3.
3V, 6.
125Gb/s 1:10 Differential Clock/Data Driver with CML Output
Description
The NB7L111M is a low skew 1–to–10 differential clock/data driver, designed with clock/data distribution in mind.
It accepts two clock/data sources into multiplexer input and reproduces ten identical CML differential outputs.
This device is ideal for clock/data distribution across the backplane or a board, and redundant clock switchover applications.
The input signals can be either differential or single–ended (if the external reference
voltage is provided).
Differential inputs incorporate internal 50 W termination resistors and accept Negative ECL (NECL), Positive ECL (PECL), LV
CMOS, LVTTL, CML,...