NBSG11 2.
5V/3.
3V SiGe 1:2 Differential Clock Driver with RSECL* Outputs
*Reduced Swing ECL
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The NBSG11 is a 1-to-2 differential fanout buffer, optimized for low skew and ultra-low JITTER.
Inputs incorporate internal 50 W termination resistors and accept NECL (Negative ECL), PECL (Positive ECL), CML, LV
CMOS, LVTTL, or LVDS.
Outputs are RSECL (Reduced Swing ECL), 400 mV.
MARKING DIAGRAM*
SG 11 LYW
• • • • • • •
Maximum Input Clock Frequency up to 12 GHz Typical Maximum Input Data Rate up to 12 Gb/s Typical 30 ps Typical Rise and Fall Times 125 ps Typical Propagation Delay RSPECL Output with Operating Range: VCC = 2.
375 V to 3.
465 V with VEE = 0 V RSNECL Output with RSNECL ...