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com NT5DS64M4CT, NT5DS32M8CT, NT5DS16M16CT NT5DS64M4CS, NT5DS32M8CS, NT5DS16M16CS NT5DS16M16CG Features CAS Latency and Frequency CAS Latency 2 2.
5 3 Maximum Operating Frequency (MHz) DDR400 DDR333 (5T) (6K/6KL) 133 166 166 200 - • • • • • • • • • • • • • • • DDR 256M bit, die C, based on 110nm design rules • Double data rate architecture: two data transfers per clock cycle • Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver • DQS is edge-aligned with data for reads and is centeraligned with data for writes Differential clock inputs (CK and CK) Four internal banks for concurrent operation Data mask (DM) fo...

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