| Part Number | P45N02LD |
| Manufacturer | Niko-Sem |
| Title | N-Channel Logic Level Enhancement Mode Field Effect Transistor |
| Description | NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P45N02LD TO-252 (DPAK) D PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 20mΩ ID 45... |
| Features |
therwise Noted) PARAMETER SYMBOL TEST CONDITIONS STATIC Drain-Source Breakdown Voltage Gate Threshold Voltage Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current
1
LIMITS UNIT MIN TYP MAX
V(BR)DSS VGS(th) IGSS IDSS ID(ON)
VGS = 0V, ID = 250µA VDS = VGS, ID = 250µA VDS = 0V, V... |
| File Size | 61.54KB |
| Datasheet |
|
P45N02LI : P45N02LI N-Channel Logic Level Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS RDS(ON) 25V 20mΩ @VGS = 10V ID 26A TO-251 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS Gate-Source Voltage VGS ±20 Continuous Drain Current Pulsed Drain Current1 Avalanche Current TC = 25 °C TC = 100 °C ID IDM IAS 26 16 70 13 Avalanche Energy L = 0.1 mH EAS 9 Power Dissipation TC = 25 °C TC = 100 °C Operating Junction & Storage Temperature Range PD Tj, Tstg 22 8.9 -55 to 150 UNITS V A mJ W °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient 1Pulse width limited by maximum junction temperature. 2Du.
P45N02LDG : P45N02LDG N-Channel Enhancement Mode MOSFET PRODUCT SUMMARY V(BR)DSS RDS(ON) 25V 20mΩ @VGS = 10V ID 32A TO-252 ABSOLUTE MAXIMUM RATINGS (TA = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS SYMBOL LIMITS Drain-Source Voltage VDS 25 Gate-Source Voltage VGS ±20 Continuous Drain Current1 Pulsed Drain Current2 TC = 25 °C TC = 100 °C ID IDM 32 20 110 Avalanche Current IAS 23 Avalanche Energy L = 0.1mH EAS 27 Power Dissipation TC = 25 °C TC = 100 °C PD 35 14 Operating Junction & Storage Temperature Range TJ, TSTG -55 to 150 UNITS V A mJ W °C THERMAL RESISTANCE RATINGS THERMAL RESISTANCE Junction-to-Case Junction-to-Ambient Case-to-Heatsink 1Pulse width lim.
P45N02LDG : NIKO-SEM N-Channel Logic Level Enhancement Mode Field Effect Transistor P45N02LDG TO-252 (DPAK) Lead-Free D PRODUCT SUMMARY V(BR)DSS 25 RDS(ON) 20m£[ ID 45A 1. GATE 2. DRAIN 3. SOURCE G S ABSOLUTE MAXIMUM RATINGS (TC = 25 °C Unless Otherwise Noted) PARAMETERS/TEST CONDITIONS Gate-Source Voltage Continuous Drain Current Pulsed Drain Current Avalanche Current Avalanche Energy Repetitive Avalanche Energy Power Dissipation 2 1 SYMBOL VGS LIMITS ±20 45 28 140 20 140 5.6 55 33 -55 to 150 275 UNITS V TC = 25 °C TC = 100 °C ID IDM IAR A L = 0.1mH L = 0.05mH TC = 25 °C TC = 100 °C EAS EAR PD Tj, Tstg TL mJ W Operating Junction & Storage Temperature Range Lead Temperature ( /16” from c.