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0V pASIC 2 FPGA Combining Speed, Density, Low Cost and Flexibility Rev.
E pASIC 2 HIGHLIGHTS ® QL2007 Ultimate Verilog/VHDL Silicon Solution -Abundant, high-speed interconnect eliminates manual routing -Flexible logic cell provides high efficiency and performance -Design tools produce fast, efficient Verilog/VHDL synthesis Speed, Density, Low Cost and Flexibility in One Device … 7,000 usable ASICgates, 174 I/O pins -16-bit counter speeds exceeding 200 MHz -7,000 usable ASIC gates, 11,000 usable PLD gates, 174 I/Os -3-layer metal ViaLink® process for small die sizes -100% routable and pin-out maintainable 3 pASIC 2 Advanced Logic Cell and I/O Capabilities...

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