Si5347/46
D UAL/ Q UAD D S P L L A NY- F REQUENCY, A NY- O UTPUT J ITTER A TTENUATORS
Si5347C/D
Features
Four or two independent DSPLLs in a Automatic free-run and holdover modes
single monolithic IC
Fastlock feature for low nominal
Each DSPLL generates any output
bandwidths
frequency from any input frequency Input frequency range:
Glitchless on-the-fly DSPLL frequency changes
Differential: 8 kHz to 750 MHz
DCO mode: as low as 0.
01 ppb steps
LV
CMOS: 8 kHz to 250 MHz Output frequency range:
per DSPLL Core
voltage:
Differential: up to 712.
5 MHz
VDD: 1.
8 V ±5%
LV
CMOS: up to 250 MHz Ultra low jitter:
VDDA: 3.
3 V ±5% Independent output clock sup...