SL4017B
Counter/Divider
High-
Voltage Silicon-Gate
CMOS
The SL4017B is 5-stage Johnson counter having 10 decoded outputs.
Inputs include a CLOCK, a RESET, and a CLOCK INHIBIT signal.
Schmitt trigger action in the CLOCK input circuit provides pulse shaping that allows unlimited clock input pulse rise and fall times.
The counter is advanced one count at the positive clock signal transition if the CLOCK INHIBIT signal is low.
Counter advancement via the clock line is inhibited when the CLOCK INHIBIT signal is high.
A high RESET signal clears the counter to its zero count.
Use of the Johnson counter configuration permits high-speed operation, 2-input decode-gating and spike-free decoded outputs.
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