D Performance: -- 80 Million Floating-Point Operations Per Second (MFLOPS) With 496-MBps-Burst I/O Rate for 40-MHz Modules -- Zero-Wait-State Local Memory for Each Processor D Organization: -- 128K-Word × 32-Bit Static Random-Access Memory (SRAM) (SMJ320MCM42D) -- 256K-Word × 32-Bit SRAM (SMJ320MCM42C) D Compliant With MIL-PRF-38535 QML D Dual C40 Performance With Local Memory Requiring Only 8.
7 Square Inches of Board Space D Enhanced Performance Offered By Multichip-Module Solution -- SMJ320MCM42C -- 67% Reduction in Number of Interconnects -- 54% Reduction (Minimum) in Board Area -- Estimated 38% Reduction in Power Dissipation Due to Reduced Parasitic Capacitance and Interconnect Lengths -...

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