D Operating
Voltage Range of 4.
5 V to 5.
5 V D State-of-the-Art Bi
CMOS Design
Significantly Reduces ICCZ
D 3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
SN54BCT541 .
.
.
J OR W PACKAGE SN74BCT541A .
.
.
DW, N, OR NS PACKAGE
(TOP VIEW)
SN54BCT541, SN74BCT541A OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS
SCBS011E – JULY 1988 – REVISED MARCH 2003
D P-N-P Inputs Reduce DC Loading D Data Flow-Through Pinout (All Inputs on
Opposite Side From Outputs)
SN54BCT541 .
.
.
FK PACKAGE (TOP VIEW)
A2 A1 OE1 VCC OE2
OE1 1 A1 2 A2 3 A3 4 A4 5 A5 6 A6 7 A7 8 A8 9
GND 10
20 VCC 19 OE2 18 Y1 17 Y2 16 Y3 15 Y4 14 Y5 13 Y6 12 Y7 11 Y8
A8 GND
Y8 Y7 Y6
A3
3 2 1 20 19
4
18
Y1
A4 5
17 Y2...