D Organization:
– TM2SN64EPU .
.
.
2 097 152 x 64 Bits
– TM4SN64EPU .
.
.
4 194 304 x 64 Bits
D Single 3.
3-V Power Supply
(±10% Tolerance)
D Designed for 66-MHz 4-Clock Systems D JEDEC 168-Pin Dual-In-Line Memory
Module (DIMM) Without Buffer for Use With
Socket
D TM2SN64EPU — Uses Eight 16M-Bit
Synchronous Dynamic RAMs (SDRAMs)
(2M × 8-Bit) in Plastic Thin Small-Outline
Packages (TSOPs)
D TM4SN64EPU — Uses Sixteen 16M-Bit
SDRAMs (2M × 8-Bit) in Plastic TSOPs
D Byte-Read/Write Capability D Performance Ranges:
TM2SN64EPU 2097152 BY 64-BIT TM4SN64EPU 4194304 BY 64-BIT SYNCHRONOUS DYNAMIC RAM MODULES
SMMS681 – AUGUST 1997
D High-Speed, Low-Noise Low-
Voltage TTL
(LVTTL) Interface
D Read Latencie...