ispLSI® 1016
In-System Programmable High Density PLD
Features
Functional Block Diagram
OutputDISCALOLNTDIENVUIECDERoutingSPool Output Routing Pool
• HIGH-DENSITY PROGRAMMABLE LOGIC
— High-Speed Global Interconnect — 2000 PLD Gates — 32 I/O Pins, Four Dedicated Inputs — 96 Registers — Wide Input Gating for Fast Counters, State
Machines, Address Decoders, etc.
— Small Logic Block Size for Random Logic — Security Cell Prevents Unauthorized Copying
• HIGH PERFORMANCE E2
CMOS® TECHNOLOGY
— fmax = 110 MHz Maximum Operating Frequency — fmax = 60 MHz for Industrial and Military/883 Devices — tpd = 10 ns Propagation Delay
— TTL Compatible Inputs and Outputs — Electrically Erasable and Reprogrammab...