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AD9238

Analog Devices
Part Number AD9238
Manufacturer Analog Devices
Description Dual A/D Converter
Published Jan 2, 2017
Detailed Description Data Sheet 12-Bit, 20 MSPS/40 MSPS/65 MSPS, Dual A/D Converter AD9238 FEATURES Integrated dual 12-bit ADC Single 3 V s...
Datasheet PDF File AD9238 PDF File

AD9238
AD9238


Overview
Data Sheet 12-Bit, 20 MSPS/40 MSPS/65 MSPS, Dual A/D Converter AD9238 FEATURES Integrated dual 12-bit ADC Single 3 V supply operation (2.
7 V to 3.
6 V) SNR = 70 dB (to Nyquist, AD9238-65) SFDR = 80.
5 dBc (to Nyquist, AD9238-65) Low power: 300 mW/channel at 65 MSPS Differential input with 500 MHz, 3 dB bandwidth Exceptional crosstalk immunity > 85 dB Flexible analog input: 1 V p-p to 2 V p-p range Offset binary or twos complement data format Clock duty cycle stabilizer Output datamux option APPLICATIONS Ultrasound equipment Direct conversion or IF sampling receivers WB-CDMA, CDMA2000, WiMAX Battery-powered instruments Hand-held scopemeters Low cost, digital oscilloscopes GENERAL DESCRIPTION The AD9238 is a dual, 3 V, 12-bit, 20 MSPS/40 MSPS/65 MSPS analog-to-digital converter (ADC).
It features dual high performance sample-and-hold amplifiers (SHAs) and an integrated voltage reference.
The AD9238 uses a multistage differential pipelined architecture with output error correction logic to provide 12-bit accuracy and to guarantee no missing codes over the full operating temperature range at up to 65 MSPS data rates.
The wide bandwidth, differential SHA allows for a variety of user-selectable input ranges and offsets, including single-ended applications.
It is suitable for various applications, including multiplexed systems that switch fullscale voltage levels in successive channels and for sampling inputs at frequencies well beyond the Nyquist rate.
Dual single-ended clock inputs are used to control all internal conversion cycles.
A duty cycle stabilizer is available and can compensate for wide variations in the clock duty cycle, allowing the converter to maintain excellent performance.
The digital output data is presented in either straight binary or twos complement format.
Out-of-range signals indicate an overflow condition, which can be used with the most significant bit to determine low or high overflow.
FUNCTIONAL BLOCK DIAGRAM AVDD AGND VIN+_A VIN–_A SHA ADC ...



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