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MC10161

Part Number	MC10161
Manufacturer	Motorola
Description	Binary to 1-8 Decoder
Published	Oct 17, 2017
Detailed Description	MOTOROLA SEMICONDUCTOR TECHNICAL DATA Binary to 1-8 Decoder (Low) The MC10161 is designed to decode a three bit input w...
Datasheet	MC10161 PDF File

Overview

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Binary to 1-8 Decoder (Low) The MC10161 is designed to decode a three bit input word to a one of eight line output.
The selected output will be low while all other outputs will be high.
The enable inputs, when either or both are high, force all outputs high.
The MC10161 is a true parallel decoder.
No series gating is used internally, eliminating unequal delay times found in other decoders.
This design provides the identical 4 ns delay from any address or enable input to any output.
A complete mux/demux operation on 16 bits for data distribution is illustrated in Figure 1.
This system, using the MC10136 control counters, has the capability of incrementing, decrementing or holding data channels.
When both S0 and S1 are low, the index counters reset, thus initializing both the mux and demux units.
The four binary outputs of the counter are buffered by the MC10101s to send twisted–pair select data to the multiplexer/demultiplexer to units.
PD = 315 ...

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