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DF202

Part Number	DF202
Manufacturer	AMI
Description	CMOS Gate Array
Published	Mar 12, 2018
Detailed Description	Core Logic ')[ ® $0,+* PLFURQ &026 *DWH $UUD\ Description DF20x is a family of static, master-slave, multiple...
Datasheet	DF202 PDF File

Overview

Core Logic ')[ ® $0,+* PLFURQ &026 *DWH $UUD\ Description DF20x is a family of static, master-slave, multiplexed scan D flip-flops without SET or RESET.
Output is unbuffered and changes state on the rising edge of the clock.
Logic Symbol Truth Table DF20x DQ C SD SE C D SD SE Q ↑HX LH ↑LXLL ↑ XHHH ↑XLHL L X X X NC NC = No Change HDL Syntax Verilog DF20x inst_name (Q, C, D, SD, SE); VHDL.
.
inst_name: DF20x port map (Q, C, D, SD, SE); Pin Loading Pin Name C D SD SE Equivalent Loads DF201 DF202 1.
0 1.
0 1.
0 1.
0 1.
0 1.
0 2.
1 2.
1 Size And Power Characteristics Cell Equivalent Gates Power Characteristicsa Static IDD (TJ = 85°C) (n...

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