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74LVC2G86

Part Number	74LVC2G86
Manufacturer	nexperia
Description	Dual 2-input EXCLUSIVE-OR gate
Published	Jul 23, 2019
Detailed Description	74LVC2G86 Dual 2-input EXCLUSIVE-OR gate Rev. 15 — 21 June 2022 Product data sheet 1. General description The 74LVC2G8...
Datasheet	74LVC2G86 PDF File

Overview

74LVC2G86 Dual 2-input EXCLUSIVE-OR gate Rev.
15 — 21 June 2022 Product data sheet 1.
General description The 74LVC2G86 is a dual 2-input EXCLUSIVE-OR gate.
Inputs can be driven from either 3.
3 V or 5 V devices.
This feature allows the use of these devices as translators in mixed 3.
3 V and 5 V environments.
Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times.
This device is fully specified for partial power down applications using IOFF.
The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
2.
Features and benefits • Wide supply voltage range from 1.
65 V to 5.
5 V • Overvoltage tolerant inputs to 5.
5 V • High noise immunity • CMOS low-power dissipation • ±24 mA output drive (VCC = 3.
0 V) • Latch-up performance exceeds 250 mA • Direct interface with TTL levels • IOFF circuitry provides partial Power-down mode operation • Complies with JEDEC standard: • JESD8...

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