DatasheetsPDF.com

SN54HC148 Datasheet PDF


Part Number SN54HC148
Manufacturer Texas Instruments
Title 8-Line to 3-Line Priority Encoders
Description The SNx4HC148 is an 8-input priority encoder. Added input enable (EI) and output enable (EO) signals allow for cascading multiple stages without ...
Features
• Wide operating voltage range of 2V to 6V
• Outputs can drive up to 10 LSTTL loads
• Low power consumption, 80-μA max ICC
• Typical tpd = 16ns
• ±4-mA output drive at 5V
• Low input current of 1μA max
• Encode eight data lines to 3-line binary (Octal) 2 Applications
• N-Bit encoding
• Code converte...

File Size 1.19MB
Datasheet SN54HC148 PDF File








Similar Ai Datasheet

SN54HC00 : This device contains four independent 2-input NAND Gates. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC00D SOIC (14) 8.70 mm × 3.90 mm SN74HC00DB SSOP (14) 6.50 mm × 5.30 mm SN74HC00N PDIP (14) 19.30 mm × 6.40 mm SN74HC00NS SO (14) 10.20 mm × 5.30 mm SN74HC00PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC00FK LCCC (20) 8.90 mm × 8.90 mm SN54HC00J CDIP (14) 21.30 mm × 7.60 mm SN54HC00W CFP (14) 9.20 mm × 6.29 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 .

SN54HC00J : This device contains four independent 2-input NAND Gates. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC00D SOIC (14) 8.70 mm × 3.90 mm SN74HC00DB SSOP (14) 6.50 mm × 5.30 mm SN74HC00N PDIP (14) 19.30 mm × 6.40 mm SN74HC00NS SO (14) 10.20 mm × 5.30 mm SN74HC00PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC00FK LCCC (20) 8.90 mm × 8.90 mm SN54HC00J CDIP (14) 21.30 mm × 7.60 mm SN54HC00W CFP (14) 9.20 mm × 6.29 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 .

SN54HC00W : This device contains four independent 2-input NAND Gates. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC00D SOIC (14) 8.70 mm × 3.90 mm SN74HC00DB SSOP (14) 6.50 mm × 5.30 mm SN74HC00N PDIP (14) 19.30 mm × 6.40 mm SN74HC00NS SO (14) 10.20 mm × 5.30 mm SN74HC00PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC00FK LCCC (20) 8.90 mm × 8.90 mm SN54HC00J CDIP (14) 21.30 mm × 7.60 mm SN54HC00W CFP (14) 9.20 mm × 6.29 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 .

SN54HC02 : This device contains four independent 2-input NOR gates. Each gate performs the Boolean function Y = A + B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC02D SOIC (14) 8.65 mm × 3.90 mm SN74HC02DB SSOP (14) 6.20 mm × 5.30 mm SN74HC02N PDIP (14) 19.30 mm × 6.40 mm SN74HC02NS SO (14) 10.20 mm × 5.30 mm SN74HC02PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC02J CDIP (14) 19.94 mm × 7.62 mm SN54HC02W CDIP (14) 9.20 mm × 6.29 mm SN54HC02FK LCCC (20) 8.89 mm × 8.89 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1Y 1 1A 2 1B 3 2Y 4 2A 5 2B 6 GND 7 14 VCC 13 4Y 12 4B 11 4A 10 .

SN54HC02J : This device contains four independent 2-input NOR gates. Each gate performs the Boolean function Y = A + B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC02D SOIC (14) 8.65 mm × 3.90 mm SN74HC02DB SSOP (14) 6.20 mm × 5.30 mm SN74HC02N PDIP (14) 19.30 mm × 6.40 mm SN74HC02NS SO (14) 10.20 mm × 5.30 mm SN74HC02PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC02J CDIP (14) 19.94 mm × 7.62 mm SN54HC02W CDIP (14) 9.20 mm × 6.29 mm SN54HC02FK LCCC (20) 8.89 mm × 8.89 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1Y 1 1A 2 1B 3 2Y 4 2A 5 2B 6 GND 7 14 VCC 13 4Y 12 4B 11 4A 10 .

SN54HC02W : This device contains four independent 2-input NOR gates. Each gate performs the Boolean function Y = A + B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC02D SOIC (14) 8.65 mm × 3.90 mm SN74HC02DB SSOP (14) 6.20 mm × 5.30 mm SN74HC02N PDIP (14) 19.30 mm × 6.40 mm SN74HC02NS SO (14) 10.20 mm × 5.30 mm SN74HC02PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC02J CDIP (14) 19.94 mm × 7.62 mm SN54HC02W CDIP (14) 9.20 mm × 6.29 mm SN54HC02FK LCCC (20) 8.89 mm × 8.89 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1Y 1 1A 2 1B 3 2Y 4 2A 5 2B 6 GND 7 14 VCC 13 4Y 12 4B 11 4A 10 .

SN54HC03 : This device contains four independent 2-input NAND Gates with open-drain outputs. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC03N PDIP (14) 19.30 mm × 6.40 mm SN74HC03NS SO (14) 10.20 mm × 5.30 mm SN74HC03D SOIC (14) 8.70 mm × 3.90 mm SN74HC03PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC03J CDIP (14) 21.30 mm × 7.60 mm SN54HC03FK LCCC (20) 8.9 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y Functional pinout of the SN74HC03 Copyri.

SN54HC03J : This device contains four independent 2-input NAND Gates with open-drain outputs. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC03N PDIP (14) 19.30 mm × 6.40 mm SN74HC03NS SO (14) 10.20 mm × 5.30 mm SN74HC03D SOIC (14) 8.70 mm × 3.90 mm SN74HC03PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC03J CDIP (14) 21.30 mm × 7.60 mm SN54HC03FK LCCC (20) 8.9 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y Functional pinout of the SN74HC03 Copyri.

SN54HC04 : .

SN54HC04J : .

SN54HC04W : .

SN54HC05 : This device contains six independent inverters with open-drain outputs. Each gate performs the Boolean function Y = A in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC05DR SOIC (14) 8.70 mm × 3.90 mm SN74HC05NR PDIP (14) 19.30 mm × 6.40 mm SN74HC05NSR SO (14) 10.20 mm × 5.30 mm SN74HC05PWR TSSOP (14) 5.00 mm × 4.40 mm SN54HC05JR CDIP (14) 21.30 mm × 7.60 mm SN54HC05FKR LCCC (20) 8.90 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1Y 2 2A 3 2Y 4 3A 5 3Y 6 GND 7 14 VCC 13 6A 12 6Y 11 5A 10 5Y 9 4A 8 4Y Functional pinout CopyrighAtn©I2M0P21OTReTxaAsN.

SN54HC08 : This device contains four independent 2-input AND gates. Each gate performs the Boolean function Y = A ● B in positive logic. Device Information PART NUMBER PACKAGE(1) BODY SIZE (NOM) SN74HC08D SOIC (14) 8.65 mm × 3.90 mm SN74HC08DB SSOP (14) 6.30 mm × 5.30 mm SN74HC08N PDIP (14) 19.34 mm × 6.35 mm SN74HC08N SO (14) 10.30 mm × 5.30 mm SN74HC08PW TSSOP (14) 5.00 mm × 4.40 mm LCCC (14) 1.83 mm × 8.89 mm SN54HC08 CDIP (14) 19.56 mm × 6.67 mm CFP (14) 9.21 mm × 5.97 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 1Y 3 2A 4 2B 5 2Y 6 GND 7 14 VCC 13 4B 12 4A 11 4Y 10 3B 9 3A 8 3Y Functional pin.

SN54HC10 : This device contains three independent 3-input NAND gates. Each gate performs the Boolean function Y = A ● B ● C in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC10D SOIC (14) 8.70 mm × 3.90 mm SN74HC10N PDIP (14) 19.30 mm × 6.40 mm SN74HC10NS SO (14) 10.20 mm × 5.30 mm SN74HC10PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC10J CDIP (14) 21.30 mm × 7.60 mm SN54HC10FK LCCC (20) 8.90 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 2A 3 2B 4 2C 5 2Y 6 GND 7 14 VCC 13 1C 12 1Y 11 3C 10 3B 9 3A 8 3Y Functional pinout CopyrighAtn©I2M0P21OTReTxaAsNInTsNtruOmT.

SN54HC109 : These devices contain two independent J-K positiveedge-triggered flip-flops. A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the other inputs. When PRE and CLR are inactive (high), data at the J and K inputs meeting the setup-time requirements are transferred to the outputs on the positive-going edge of the clock (CLK) pulse. Clock triggering occurs at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval, data at the J and K inputs can be changed without affecting the levels at the outputs. These versatile flipflops can perform as toggle flip-flops by grounding K and ty.

SN54HC10J : This device contains three independent 3-input NAND gates. Each gate performs the Boolean function Y = A ● B ● C in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC10D SOIC (14) 8.70 mm × 3.90 mm SN74HC10N PDIP (14) 19.30 mm × 6.40 mm SN74HC10NS SO (14) 10.20 mm × 5.30 mm SN74HC10PW TSSOP (14) 5.00 mm × 4.40 mm SN54HC10J CDIP (14) 21.30 mm × 7.60 mm SN54HC10FK LCCC (20) 8.90 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 2A 3 2B 4 2C 5 2Y 6 GND 7 14 VCC 13 1C 12 1Y 11 3C 10 3B 9 3A 8 3Y Functional pinout CopyrighAtn©I2M0P21OTReTxaAsNInTsNtruOmT.

SN54HC11 : This device contains three independent 3-input AND gates. Each gate performs the Boolean function Y = A ● B ● C in positive logic. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) SN74HC11DR SOIC (14) 8.70 mm × 3.90 mm SN74HC11NR PDIP (14) 19.30 mm × 6.40 mm SN74HC11NSR SO (14) 10.20 mm × 5.30 mm SN74HC11PWR TSSOP (14) 5.00 mm × 4.40 mm SN54HC11JR CDIP (14) 21.30 mm × 7.60 mm SN54HC11WR CFP (14) 9.20 mm × 6.29 mm SN54HC11FKR LCCC (20) 8.90 mm × 8.90 mm (1) For all available packages, see the orderable addendum at the end of the data sheet. 1A 1 1B 2 3 2A 2B 4 5 2C 2Y 6 GND 7 14 VCC 13 1C 12 1Y 11 3C 10 3B 9 3A 8 3Y Functional pino.




Since 2006. D4U Semicon,
Electronic Components Datasheet Search Site. (Privacy Policy & Contact)