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SN74AUP2G34

Part Number	SN74AUP2G34
Manufacturer	Texas Instruments
Description	LOW-POWER DUAL BUFFER GATE
Published	Dec 24, 2022
Detailed Description	SN74AUP2G34 www.ti.com SCES751B – SEPTEMBER 2009 – REVISED MARCH 2010 LOW-POWER DUAL BUFFER GATE Check for Samples: SN...
Datasheet	SN74AUP2G34 PDF File

Overview

SN74AUP2G34 www.
ti.
com SCES751B – SEPTEMBER 2009 – REVISED MARCH 2010 LOW-POWER DUAL BUFFER GATE Check for Samples: SN74AUP2G34 FEATURES 1 • Available in the Texas Instruments NanoStar™ Package • Low Static-Power Consumption: ICC = 0.
9 mA Max • Low Dynamic-Power Consumption: Cpd = 4.
3 pF Typ at 3.
3 V • Low Input Capacitance: Ci = 1.
5 pF Typ • Low Noise: Overshoot and Undershoot <10% of VCC • Ioff Supports Partial-Power-Down Mode Operation • Wide Operating VCC Range of 0.
8 V to 3.
6 V • Optimized for 3.
3-V Operation • 3.
6-V I/O Tolerant to Support Mixed-Mode Signal Operation • tpd = 4.
3 ns Max at 3.
3 V • Suitable for Point-to-Point Applications • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II • ESD Performance Tested Per JESD 22 – 2000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) DCK PACKAGE (TOP VIEW) DRY PACKAGE (TOP VIEW) DSF PACKAGE (TOP VIEW) YFP PACKAGE (TOP VIEW) 1A 1 6 1Y GND 2 5 V CC 2A 3 4 2Y 1A 1 GND 2 2A 3 6 1Y 5V CC 4 2Y 1A 1 GND 2 2A 3 6 1Y 5V CC 4 2Y 1A A1 1 6 A2 1Y GND V B1 2 5 B2 CC 2A C1 3 4 C2 2Y See mechanical drawings for dimensions.
DESCRIPTION/ORDERING INFORMATION The AUP family is TI's premier solution to the industry's low-power needs in battery-powered portable applications.
This family ensures a very low static- and dynamic-power consumption across the entire VCC range of 0.
8 V to 3.
6 V, resulting in increased battery life (see Figure 1).
This product also maintains excellent signal integrity (see the very low undershoot and overshoot characteristics shown in Figure 2).
Static-Power Consumption (µA) 100% Dynamic-Power Consumption (pF) 100% 80% 80% 60% 40% 3.
3-V Logic(A) 60% 40% 3.
3-V Logic(A) 20% 0% 20% AAUUPP 0% AUP (A) Single, dual, and triple gates Voltage (V) Switching Characteristics at 25 MHz(A) 3.
5 3.
0 2.
5 2.
0 Input Output 1.
5 1.
0 0.
5 0.
0 -0.
5 0 5 10 15 20 25 30 35 40 45 Time (ns) (A) SN74AUP2Gxx data at CL = 15 pF.
Figure 1.
AUP – The L...

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