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ADS62P44

Texas Instruments
Part Number ADS62P44
Manufacturer Texas Instruments
Description Analog-to-Digital Converters
Published Mar 6, 2024
Detailed Description ADS62P45, ADS62P44 ADS62P43, ADS62P42 www.ti.com SLAS561C – JULY 2007 – REVISED FEBRUARY 2012 DUAL CHANNEL, 14-BITS, ...
Datasheet PDF File ADS62P44 PDF File

ADS62P44
ADS62P44

Overview
ADS62P45, ADS62P44 ADS62P43, ADS62P42 www.
ti.
com SLAS561C – JULY 2007 – REVISED FEBRUARY 2012 DUAL CHANNEL, 14-BITS, 125/105/80/65 MSPS ADC WITH DDR LVDS/CMOS OUTPUTS Check for Samples: ADS62P45, ADS62P44, ADS62P43, ADS62P42 FEATURES 1 • Maximum Sample Rate: 125 MSPS • 14-Bit Resolution with No Missing Codes • 95 dB Crosstalk • Parallel CMOS and DDR LVDS Output Options • 3.
5 dB Coarse Gain and Programmable Fine Gain up to 6 dB for SNR/SFDR Trade-Off • Digital Processing Block with: – Offset Correction – Fine Gain Correction, in Steps of 0.
05 dB – Decimation by 2/4/8 – Built-in and Custom Programmable 24-Tap Low-/High-/Band-Pass Filters • Supports Sine, LVPECL, LVDS and LVCMOS Clocks and Amplitude Down to 400 mVPP • Clock Duty Cycle Stabilizer • Internal Reference; Supports External Reference also • 64-QFN Package (9mm × 9mm) • Pin Compatible 12-Bit Family (ADS62P2X) APPLICATIONS • Wireless Communications Infrastructure • Software Defined Radio • Power Amplifier Linearization • 802.
16d/e • Medical Imaging • Radar Systems • Test and Measurement Instrumentation DESCRIPTION ADS62P4X is a dual channel 14-bit A/D converter family with maximum sample rates up to 125 MSPS.
It combines high performance and low power consumption in a compact 64 QFN package.
Using an internal sample and hold and low jitter clock buffer, the ADC supports high SNR and high SFDR at high input frequencies.
It has coarse and fine gain options that can be used to improve SFDR performance at lower full-scale input ranges.
ADS62P4X includes a digital processing block that consists of several useful and commonly used digital functions such as ADC offset correction, fine gain correction (in steps of 0.
05 dB), decimation by 2,4,8 and in-built and custom programmable filters.
By default, the digital processing block is bypassed, and its functions are disabled.
Two output interface options exist – parallel CMOS and DDR LVDS (Double Data Rate).
ADS62P4X includes internal references while traditional r...


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