NCP1052

NCP105 : Pin No. Pin Name Description 1 OUT Regulated output voltage pin. A small ceramic capacitor with minimum value of 1 mF is needed from this pin to ground to assure stability. 2 GND Power supply ground. 3 EN Driving EN over 0.9 V turns on the regulator. Driving EN below 0.4 V puts the regulator into shutdown mode. 4 IN Input pin. A small capacitor is needed from this pin to ground to assure stability. − EPAD Exposed pad should be connected directly to the GND pin. Soldered to a large ground copper plane allows for effective heat removal. ABSOLUTE MAXIMUM RATINGS Rating Symbol Value Unit Input Voltage (Note 1) VIN −0.3 V to 6 V V Output Voltage VOUT −0.3 V to VIN .

NCP1050 : Pin Pin (SOT−223) (PDIP−8) Function 1 1 VCC 2 2 Control Input 4 3, 7, 8 Ground − 4 No Connection 3 5 Power Switch Drain Description This is the positive supply voltage input. During startup, power is supplied to this input from Pin 5. When VCC reaches VCC(on), the Startup Circuit turns off and the output is allowed to begin switching with 1.0 V hysteresis on the VCC pin. The capacitance connected to this pin programs fault timing and frequency modulation rate. The Power Switch Circuit is turned off when a current greater than approximately 50 mA is drawn out of or applied to this pin. A 10 V clamp is built onto the chip to protect the device from ESD damage or overvoltag.

NCP1051 : Pin Pin (SOT−223) (PDIP−8) Function 1 1 VCC 2 2 Control Input 4 3, 7, 8 Ground − 4 No Connection 3 5 Power Switch Drain Description This is the positive supply voltage input. During startup, power is supplied to this input from Pin 5. When VCC reaches VCC(on), the Startup Circuit turns off and the output is allowed to begin switching with 1.0 V hysteresis on the VCC pin. The capacitance connected to this pin programs fault timing and frequency modulation rate. The Power Switch Circuit is turned off when a current greater than approximately 50 mA is drawn out of or applied to this pin. A 10 V clamp is built onto the chip to protect the device from ESD damage or overvoltag.

NCP1053 : Pin Pin (SOT−223) (PDIP−8) Function 1 1 VCC 2 2 Control Input 4 3, 7, 8 Ground − 4 No Connection 3 5 Power Switch Drain Description This is the positive supply voltage input. During startup, power is supplied to this input from Pin 5. When VCC reaches VCC(on), the Startup Circuit turns off and the output is allowed to begin switching with 1.0 V hysteresis on the VCC pin. The capacitance connected to this pin programs fault timing and frequency modulation rate. The Power Switch Circuit is turned off when a current greater than approximately 50 mA is drawn out of or applied to this pin. A 10 V clamp is built onto the chip to protect the device from ESD damage or overvoltag.

NCP1054 : Pin Pin (SOT−223) (PDIP−8) Function 1 1 VCC 2 2 Control Input 4 3, 7, 8 Ground − 4 No Connection 3 5 Power Switch Drain Description This is the positive supply voltage input. During startup, power is supplied to this input from Pin 5. When VCC reaches VCC(on), the Startup Circuit turns off and the output is allowed to begin switching with 1.0 V hysteresis on the VCC pin. The capacitance connected to this pin programs fault timing and frequency modulation rate. The Power Switch Circuit is turned off when a current greater than approximately 50 mA is drawn out of or applied to this pin. A 10 V clamp is built onto the chip to protect the device from ESD damage or overvoltag.

NCP1055 : Pin Pin (SOT−223) (PDIP−8) Function 1 1 VCC 2 2 Control Input 4 3, 7, 8 Ground − 4 No Connection 3 5 Power Switch Drain Description This is the positive supply voltage input. During startup, power is supplied to this input from Pin 5. When VCC reaches VCC(on), the Startup Circuit turns off and the output is allowed to begin switching with 1.0 V hysteresis on the VCC pin. The capacitance connected to this pin programs fault timing and frequency modulation rate. The Power Switch Circuit is turned off when a current greater than approximately 50 mA is drawn out of or applied to this pin. A 10 V clamp is built onto the chip to protect the device from ESD damage or overvoltag.