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SN54LS395

Motorola Inc
Part Number SN54LS395
Manufacturer Motorola Inc
Description 4-BIT SHIFT REGISTER
Published Apr 16, 2005
Detailed Description SN74LS395 4-BIT SHIFT REGISTER WITH 3-STATE OUTPUTS The SN74LS395 is a 4-Bit Register with 3-state outputs and can opera...
Datasheet PDF File SN54LS395 PDF File

SN54LS395
SN54LS395

Overview
SN74LS395 4-BIT SHIFT REGISTER WITH 3-STATE OUTPUTS The SN74LS395 is a 4-Bit Register with 3-state outputs and can operate in either a synchronous parallel load or a serial shift-right mode, as determined by the Select input.
An asynchronous active LOW Master Reset (MR) input overrides the synchronous operations and clears the register.
An active HIGH Output Enable (OE) input controls the 3-state output buffers, but does not interfere with the other operations.
The fourth stage also has a conventional output for linking purposes in multi-stage serial operations.
4-BIT SHIFT REGISTER WITH 3-STATE OUTPUTS LOW POWER SCHOTTKY • Shift Left or Parallel 4-Bit Register • 3-State Outputs • Input Clamp Diodes Limit High-Speed Termination Effects J SUFFIX CERAMIC CASE 620-09 16 1 CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 O0 15 O1 14 O2 13 O3 12 Q3 11 CP 10 OE 9 16 1 N SUFFIX PLASTIC CASE 648-08 1 MR 2 DS 3 P0 4 P1 5 P2 6 P3 7 S 8 GND 16 1 D SUFFIX SOIC CASE 751B-03 PIN NAMES LOADING (Note a) HIGH LOW 0.
25 U.
L.
0.
25 U.
L.
0.
25 U.
L.
0.
25 U.
L.
0.
25 U.
L.
0.
25 U.
L.
15 U.
L.
5 U.
L.
P0 – P3 DS S CP MR OE O0 – O3 Q3 Parallel Inputs Serial Data Input Mode Select Input Clock (Active LOW) Input Master Reset (Active LOW) Input Output Enable (Active HIGH) Input 3-State Register Outputs Register Output 0.
5 U.
L.
0.
5 U.
L.
0.
5 U.
L.
0.
5 U.
L.
0.
5 U.
L.
0.
5 U.
L.
65 U.
L.
10 U.
L.
ORDERING INFORMATION SN74LSXXXJ SN74LSXXXN SN74LSXXXD Ceramic Plastic SOIC LOGIC SYMBOL 7 3 4 5 6 NOTES: a) 1 TTL Unit Load (U.
L.
) = 40 µA HIGH/1.
6 mA LOW.
2 10 9 DS CP OE S P0 P1 P2 P3 Q3 MR O0 O1 O2 O3 11 1 15 14 13 12 VCC = PIN 16 GND = PIN 8 FAST AND LS TTL DATA 5-551 SN74LS395 LOGIC DIAGRAM S Ds P0 P1 P2 P3 CP CP D Q CP D Q CP D Q CP D Q CD MR CD CD CD OE O0 O1 O2 O3 Q3 FUNCTION DESCRIPTION The SN74LS395 contains four D-type edge-triggered flip-flops and auxiliary gating to select a D input either from a Parallel (Pn) input or from the preceding stage.
When the Select input is HIGH, the ...


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