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PCA9516

Part Number PCA9516
Manufacturer NXP
Title 5-channel I2C hub
Description ...
Features ...

File Size 112.92KB
Datasheet PCA9516 PDF File







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PCA9510 : The PCA9510 and PCA9511 are hot swappable I2C and SMBus buffers that allows I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9510 and PCA9511 provides bi-directional buffering, keeping the backplane and card capacitances isolated. The PCA9511 rise time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise time requirements, while the PCA9510 has no rise time accelerator circuitry to prevent interference when there are .

PCA9510A : The PCA9510A is a hot swappable I2C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9510A provides bidirectional buffering, keeping the backplane and card capacitances isolated. The PCA9510A has no rise time accelerator circuitry to prevent interference when there are multiple devices in the same system. The PCA9510A incorporates a digital ENABLE input pin, which enables the device when asserted HIGH and forces the device .

PCA9511 : The PCA9511 is a are hot swappable I2C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a STOP command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9511 provides bidirectional buffering, keeping the backplane and card capacitances isolated. The PCA9511 rise time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise time requirements to prevent interference when there are multiple devices in the same system. The PCA9511 incorporates a digital ENA.

PCA9511A : The PCA9511A is a hot swappable I2C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9511A provides bidirectional buffering, keeping the backplane and card capacitances isolated. The PCA9511A rise time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise time requirements. The PCA9511A incorporates a digital ENABLE input pin, which enables the device when asserted HIGH and forces the d.

PCA9512 : The PCA9512 is a hot swappable I2C and SMBus buffer that allows I/O card insertion into a live backplane without corruption of the data and clock buses and includes two dedicated supply voltage pins to provide level shifting between 3.3 V and 5 V systems while maintaining the best noise margin for each voltage level. Either pin may be powered with supply voltages ranging from 2.7 V to 5.5 V with no constraints on which supply voltage is higher. Control circuitry prevents the backplane from being connected to the card until a stop bit or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9512 provides bi-directional buffering, keeping the .

PCA9512A : The PCA9512A/B is a hot swappable I2C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corruption of the data and clock buses and includes two dedicated supply voltage pins to provide level shifting between 3.3 V and 5 V systems while maintaining the best noise margin for each voltage level. Either pin may be powered with supply voltages ranging from 2.7 V to 5.5 V with no constraints on which supply voltage is higher. Control circuitry prevents the backplane from being connected to the card until a stop bit or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9512A/B provides bidirectional buffering, kee.

PCA9512B : The PCA9512A/B is a hot swappable I2C-bus and SMBus buffer that allows I/O card insertion into a live backplane without corruption of the data and clock buses and includes two dedicated supply voltage pins to provide level shifting between 3.3 V and 5 V systems while maintaining the best noise margin for each voltage level. Either pin may be powered with supply voltages ranging from 2.7 V to 5.5 V with no constraints on which supply voltage is higher. Control circuitry prevents the backplane from being connected to the card until a stop bit or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9512A/B provides bidirectional buffering, kee.

PCA9513 : The PCA9513 and PCA9514 are hot swappable I2C and SMBus buffers that allows I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9511, PCA9513, and PCA9514 provides bi-directional buffering, keeping the backplane and card capacitances isolated. Rise time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise time requirements. The PCA9513 and PCA9514 incorporate a digital ENABLE input pin, which enables the device when asse.

PCA9513A : The PCA9513A and PCA9514A are hot swappable I2C-bus and SMBus buffers that allow I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9513A and PCA9514A provides bidirectional buffering, keeping the backplane and card capacitances isolated. Rise time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise time requirements. The PCA9513A and PCA9514A incorporates a digital ENABLE input pin, which enables the device when asser.

PCA9514 : The PCA9513 and PCA9514 are hot swappable I2C and SMBus buffers that allows I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9511, PCA9513, and PCA9514 provides bi-directional buffering, keeping the backplane and card capacitances isolated. Rise time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise time requirements. The PCA9513 and PCA9514 incorporate a digital ENABLE input pin, which enables the device when asse.

PCA9514A : The PCA9513A and PCA9514A are hot swappable I2C-bus and SMBus buffers that allow I/O card insertion into a live backplane without corrupting the data and clock buses. Control circuitry prevents the backplane from being connected to the card until a stop command or bus idle occurs on the backplane without bus contention on the card. When the connection is made, the PCA9513A and PCA9514A provides bidirectional buffering, keeping the backplane and card capacitances isolated. Rise time accelerator circuitry allows the use of weaker DC pull-up currents while still meeting rise time requirements. The PCA9513A and PCA9514A incorporates a digital ENABLE input pin, which enables the device when asser.

PCA9515 : The PCA9515 is a BiCMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDAn) and the clock (SCLn) lines, thus enabling two buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9515 enables the system designer to isolate two halves of a bus, thus more devices or longer length can be accommodated. It can also be used to run two buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the 100 kHz bus is isolated when 400 kHz operation of the other.

PCA9515A : The PCA9515A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDA) and the clock (SCL) lines, thus enabling two buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9515A enables the system designer to isolate two halves of a bus, thus more devices or longer length can be accommodated. It can also be used to run two buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the 100 kHz bus is isolated when 400 kHz operation of the other i.

PCA9515A : This dual bidirectional I2C buffer is operational at 2.3V to 3.6-V VCC. The PCA9515A is a BiCMOS integrated circuit intended for I2C bus and SMBus systems applications. The device contains two identical bidirectional open-drain buffer circuits that enable I2C and similar bus systems to be extended without degradation of system performance. The PCA9515A buffers both the serial data (SDA) and serial clock (SCL) signals on the I2C bus, while retaining all the operating modes and features of the I2C system. This enables two buses of 400-pF bus capacitance to be connected in an I2C application. The I2C bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9.

PCA9515B : The PCA9515B is a BiCMOS dual bidirectional buffer integrated circuit intended for I2C bus and SMBus applications. The device contains two identical bidirectional open-drain buffer circuits that enables I2C and similar bus systems to be extended (or add slaves) without degrading system performance. The dual bidirectional I2C buffer is operational at 2.3 V to 3.6 V VCC. The PCA9515B buffers both the serial data (SDA) and serial clock (SCL) signals on the I2C bus, while retaining all the operating modes and features of the I2C system. The device allows two buses, of 400-pF bus capacitance, to be connected in an I2C application. Device Information(1) PART NUMBER PACKAGE BODY SIZE (NOM) PCA.

PCA9516A : The PCA9516A is a CMOS integrated circuit intended for application in I2C-bus and SMBus systems. While retaining all the operating modes and features of the I2C-bus system, it permits extension of the I2C-bus by buffering both the data (SDAn) and the clock (SCLn) lines, thus enabling five buses of 400 pF. The I2C-bus capacitance limit of 400 pF restricts the number of devices and bus length. Using the PCA9516A enables the system designer to divide the bus into five segments off of a hub where any segment-to-segment transition sees only one repeater delay. It can also be used to run different buses at 5 V and 3.3 V or 400 kHz and 100 kHz buses where the 100 kHz bus is isolated when 400 kHz oper.




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