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74LS73

Part Number	74LS73
Manufacturer	Fairchild Semiconductor
Description	Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops
Published	Apr 23, 2005
Detailed Description	DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs August 1986 Rev...
Datasheet	74LS73 PDF File

Overview

DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs August 1986 Revised March 2000 DM74LS73A Dual Negative-Edge-Triggered Master-Slave J-K Flip-Flops with Clear and Complementary Outputs General Description This device contains two independent negative-edge-triggered J-K flip-flops with complementary outputs.
The J and K data is processed by the flip-flops on the falling edge of the clock pulse.
The clock triggering occurs at a voltage level and is not directly related to the transition time of the negative going edge of the clock pulse.
The data on the J and K inputs is allowed to change while the clock is HIGH or LOW without affecting t...

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