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IDT49C466

Part Number	IDT49C466
Manufacturer	Integrated Device
Description	64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT
Published	Apr 27, 2005
Detailed Description	64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT Integrated Device Technology, Inc. IDT49C466 IDT49C466A FEATURES:...
Datasheet	IDT49C466 PDF File

Overview

64-BIT FLOW-THRU ERROR DETECTION AND CORRECTION UNIT Integrated Device Technology, Inc.
IDT49C466 IDT49C466A FEATURES: • 64-bit wide Flow-thruEDC™ • Separate System and Memory Data Input/Output Buses • — Error Detect Time: 10ns — Error Correct Time: 15ns • Corrects all single bit errors; Detects all double bit errors and some multiple bit errors • Configurable 16-deep bus read/write FIFOs with flags • Simultaneous check bit generation and correction of memory data • Supports partial word writes on byte boundaries • Low noise output • Sophisticated error diagnostics and error logging • Parity generation on system data bus • 208-pin Plastic Quad Flatpack DESCRIPTION: The IDT49C466/A 64-bit Flow-thruEDC is a high-speed error detection and correction unit that ensures data integrity in memory systems.
The flow-thru architecture, with separate system and memory data buses, is ideally suited for pipelined memory systems.
Implementing a modified Hamming code, the IDT49C466/A corrects all single bit hard and soft errors, and detects all double bit errors.
The read/write FIFOs can store up to sixteen words.
FIFO full and empty flags indicate whether additional data can be written to or read from the EDC.
Check bit generation for partial word writes on byte boundaries is supported on the IDT49C466/A.
Diagnostic features include a check bit register, syndrome registers, a four bit error counter which logs up to 15 errors, and an error data register which stores the complete error data word.
Parity can be generated and checked on the system bus by the IDT49C466/A.
SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM DIAGNOSTIC & STATUS REGISTERS ERR MERR READ BUFFER 16 WORDS BY 64 MD LATCH OUT CHECK-BIT COMPARATOR & SYNDROME GENERATOR & ERROR DETECTOR M U X ERROR CORRECT MD CHECK-BIT GENERATOR MD CHK-BIT LATCH CBI0-7 M U X MD LATCH IN SD0-63 WRITE BACK PATH SD LATCH IN WRITE BUFFER 16 WORDS BY 72 PARITY GENERATE & PARITY CHECK M U X B Y T E M U X SD CHECK-BIT GENERATOR MD0-63 SD L...

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