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MC88920

Part Number	MC88920
Manufacturer	Motorola
Description	LOW SKEW CMOS PLL CLOCK DRIVER With Power-Down/ Power-Up Feature
Published	Apr 30, 2005
Detailed Description	MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document from Logic Marketing Low Skew CMOS PLL Clock Driver With Po...
Datasheet	MC88920 PDF File

Overview

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document from Logic Marketing Low Skew CMOS PLL Clock Driver With Power-Down/Power-Up Feature The MC88920 Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock.
It is designed to provide clock distribution for CISC microprocessor or single processor RISC systems.
The RST_IN/RST_OUT(LOCK) pins provide a processor reset function designed specifically for the MC68/EC/LC030/040 microprocessor family.
The PLL allows the the high current, low skew outputs to lock onto a single clock input and distribute it with essentially zero delay to multiple locations on a board.
The PLL also allows the MC88920 to multiply a low frequency input clock and distribute it locally at a higher (2X) system frequency.
MC88920 LOW SKEW CMOS PLL CLOCK DRIVER With Power–Down/ Power–Up Feature • 2X_Q Output Meets All Requirements of the 20 and 25MHz 68040 Microprocessor PCLK Input Speci...

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