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MM74HC594

Fairchild
Part Number MM74HC594
Manufacturer Fairchild
Description 8-Bit Shift Register with Output Registers
Published May 9, 2005
Detailed Description MM74HC594 8-Bit Shift Register with Output Registers January 1992 Revised May 1999 MM74HC594 8-Bit Shift Register with...
Datasheet PDF File MM74HC594 PDF File

MM74HC594
MM74HC594

Overview
MM74HC594 8-Bit Shift Register with Output Registers January 1992 Revised May 1999 MM74HC594 8-Bit Shift Register with Output Registers General Description This high speed shift register utilizes advanced silicon-gate CMOS technology.
This device possesses the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads.
This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register.
Separate clocks and direct overriding clears are provided for both the shift register and the storage register.
The shift register has a direct-overriding clear, serial input, and serial output (standard) pins for cascading.
Both the shift register and storage register use positive-edge triggered clocks.
If both clocks are connected together, the shift register state will always be one clock pulse ahead of the storage register.
The 74HC logic family is speed, function, and pin-out compatible with the standard 74LS logic family.
All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.
Features s Low quiescent current: 80 µA maximum s Low input current: 1 µA maximum s 8-bit serial-in, parallel-out shift register with storage s Wide operating voltage range: 2V to 6V s Cascadable s Shift register has direct clear s Guaranteed shift frequency: DC to30 MHz Ordering Code: Order Number MM74HC594M MM74HC594N Package Number M16A N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.
150 Narrow 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.
300 Wide Devices also available in Tape and Reel.
Specify by appending the suffix letter “X” to the ordering code.
Connection Diagram Truth Table RCK X X X SCK X X ↑ SCLR RCLR X L H L X H Function Storage Register cleared Shift Register cleared Q’H = 0 Shift Register clocked QN = Qn−1, Q0 = SER Contents of Shift ↑ X H H Register transferred...


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