Part Number  74F283 
Manufacturer  Philips 
Title  4bit binary full adder 
Description  The 74F283 adds two 4bit binary words (An plus Bn) plus the incoming carry. The binary sum appears on the sum outputs (Σ0–Σ3) and the outgoing ca... 
Features 
• High speed 4bit addition • Cascadable in 4bit increments • Fast Internal carry lookahead DESCRIPTION The 74F283 adds two 4bit binary words (An plus Bn) plus the incoming carry. The binary sum appears on the sum outputs (Σ0 –Σ3) and the outgoing carry (COUT) according to the equation: CIN+20(A0... 
File Size  114.22KB 
Datasheet 

74F280 : The F280 is a highspeed parity generator/checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH. If an even number of inputs is HIGH, the Sum Even output is HIGH. If an odd number is HIGH, the Sum Even output is LOW. The Sum Odd output is the complement of the Sum Even output. Ordering Code: Order Number 74F280SC 74F280SJ 74F280PC Package Number M14A M14D N14A Package Description 14Lead Small Outline Integrated Circuit (SOIC), JEDEC MS120, 0.150 Narrow 14Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 14Lead Plastic DualInLine Package (PDIP), JEDEC MS001, 0.300 Wide Devices also available in Tape and Reel. Specif.
74F280 : The ’F280 is a highspeed parity generator checker that accepts nine bits of input data and detects whether an even or an odd number of these inputs is HIGH If an even number of inputs is HIGH the Sum Even output is HIGH If an odd number is HIGH the Sum Even output is LOW The Sum Odd output is the complement of the Sum Even output Features Y Guaranteed 4000V minimum ESD protection Commercial 74F280PC Military Package Number N14A Package Description 14Lead (0 300 Wide) Molded DualInLine 14Lead Ceramic DualInLine 14Lead (0 150 Wide) Molded Small Outline JEDEC 14Lead (0 300 Wide) Molded Small Outline EIAJ 14Lead Cerpack 20Lead Ceramic Leadless Chip Carrier Type C 54F280DM (Note.
74F280B : The 74F280B is a 9bit Parity Generator or Checker commonly used to detect errors in high speed data transmission or data retrieval systems. Both Even (∑E) and Odd (∑O) parity outputs are available for generating or checking even or odd parity on up to 9 bits. The Even (∑E) parity output is High when an even number of Data inputs (I0  I8) are High. The Odd (∑O) parity output is High when an odd number of Data inputs are High. Expansion to larger word sizes is accomplished by tying the Even (∑E) outputs of up to nine parallel devices to the data inputs of the final stage. This expansion scheme allows an 81bit data word to be checked in less than 20ns. TYPE 74F280B 10 I2 9 8 I1 I0 SF00849 .
74F280B : These universal, monolithic, 9bit parity generators/checkers feature odd and even outputs to facilitate operation of either odd or even parity application. The wordlength capability is easily expanded by cascading. The SN54F280B is characterized for operation over the full military temperature range of − 55°C to 125°C. The SN74F280B is characterized for operation from 0°C to 70°C. FUNCTION TABLE NO. OF INPUTS A THRU I THAT ARE HIGH 0, 2, 4, 6, 8 OUTPUTS Σ EVEN H Σ ODD L 1, 3, 5, 7, 9 L H logic symbol† SN54F280B, SN74F280B 9ĆBIT PARITY GENERATORS/CHECKERS ą SDFS008A − D2932, APRIL 1986 − REVISED OCTOBER 1993 SN54F280B J PACKAGE SN74F280B D OR N PACKAGE (TOP VIEW) G1 H.
74F283 : The 74F283 highspeed 4bit binary full adder with internal carry lookahead accepts two 4bit binary words (A0–A3, B0–B3) and a Carry input (C0). It generates the binary Sum outputs (S0–S3) and the Carry output (C4) from the most significant bit. The 74F283 will operate with either active HIGH or active LOW operands (positive or negative logic). Ordering Code: Order Number 74F283SC 74F283SJ 74F283PC Package Number M16A M16D N16E Package Description 16Lead Small Outline Integrated Circuit (SOIC), JEDEC MS012, 0.150 Narrow 16Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16Lead Plastic DualInLine Package (PDIP), JEDEC MS001, 0.300 Wide Devices also available in Tape and Re.
74F283 : The ’F283 highspeed 4bit binary full adder with internal carry lookahead accepts two 4bit binary words (A0 –A3 B0 – B3) and a Carry input (C0) It generates the binary Sum outputs (S0 – S3) and the Carry output (C4) from the most significant bit The ’F283 will operate with either active HIGH or active LOW operands (positive or negative logic) Features Y Guaranteed 4000V minimum ESD protection Commercial 74F283PC Military Package Number N16E Package Description 16Lead (0 300 Wide) Molded DualInLine 16Lead Ceramic DualInLine 16Lead (0 150 Wide) Molded Small Outline JEDEC 16Lead (0 300 Wide) Molded Small Outline EIAJ 16Lead Cerpack 20Lead Ceramic Leadless Chip Carrier Type C .
74F283 : The ′F283 is a full adder that performs the addition of two 4bit binary words. The sum (Σ) outputs are provided for each bit and the resultant carry (C4) output is obtained from the fourth bit. The device features full internal lookahead across all four bits generating the carry term C4 in typically 5.7 ns. This capability provides the system designer with partial lookahead performance at the economy and reduced package count of a ripplecarry implementation. The adder logic, including the carry, is implemented in its true form. Endaround carry can be accomplished without the need for logic or level inversion. The ′F283 can be used with either allactivehigh (positive logic) or allacti.