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74HCT10

Philips
Part Number 74HCT10
Manufacturer Philips
Description Triple 3-input NAND gate
Published May 28, 2005
Detailed Description INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Fam...
Datasheet PDF File 74HCT10 PDF File

74HCT10
74HCT10

Overview
INTEGRATED CIRCUITS DATA SHEET For a complete data sheet, please also download: • The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications • The IC06 74HC/HCT/HCU/HCMOS Logic Package Information • The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines 74HC/HCT10 Triple 3-input NAND gate Product specification File under Integrated Circuits, IC06 December 1990 Philips Semiconductors Product specification Triple 3-input NAND gate FEATURES • Output capability: standard • ICC category: SSI GENERAL DESCRIPTION 74HC/HCT10 The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no.
7A.
The 74HC/HCT10 provide the 3-input NAND function.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns TYPICAL SYMBOL tPHL/ tPLH CI CPD Notes 1.
CPD is used to determine the dynamic power dissipation (PD in µW): PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fO) where: fi = input frequency in MHz fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in V ∑ (CL × VCC2 × fo) = sum of outputs 2.
For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC − 1.
5 V.
ORDERING INFORMATION See “74HC/HCT/HCU/HCMOS Logic Package Information”.
PARAMETER propagation delay nA, nB, nC to nY input capacitance power dissipation capacitance per gate notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V 9 3.
5 12 11 3.
5 14 HCT ns pF pF UNIT December 1990 2 Philips Semiconductors Product specification Triple 3-input NAND gate PIN DESCRIPTION PIN NO.
1, 3, 9 2, 4, 10 13, 5, 11 12, 6, 8 7 14 SYMBOL 1A to 3A 1B to 3B 1C to 3C 1Y to 3Y GND VCC NAME AND FUNCTION data inputs data inputs data inputs data outputs ground (0 V) positive supply voltage 74HC/HCT10 Fig.
1 Pin configuration.
Fig.
2 Logic symbol.
Fig.
3 IEC logic symbol.
FUNCTION TABLE INPUTS nA L L L L H H H H Notes Fig.
4 Functional diagram.
Fig.
5 Logic diagram (one gate).
1.
H = HIGH voltage level L =...


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