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CY7C1355A

Part Number	CY7C1355A
Manufacturer	Cypress Semiconductor
Description	(CY7C1355A / CY7C1357A) 256K x 36/512K x 18 Synchronous Flow-Thru SRAM
Published	Oct 16, 2006
Detailed Description	www.DataSheet4U.com CY7C1357A CY7C1355A 256K x 36/512K x 18 Synchronous Flow-Thru SRAM with NoBL™ Architecture Feature...
Datasheet	CY7C1355A PDF File

Overview

www.
DataSheet4U.
com CY7C1357A CY7C1355A 256K x 36/512K x 18 Synchronous Flow-Thru SRAM with NoBL™ Architecture Features • Zero Bus Latency, no dead cycles between write and read cycles • Fast access times: 2.
5 ns, 3.
0 ns, and 3.
5 ns • Fast clock speed: 133, 117, and 100 MHz • Fast OE access time: 6.
5, 7.
0, and 7.
5ns • Internally synchronized registered outputs eliminate the need to control OE • • • • • • • • • • • 3.
3V –5% and +5% power supply 3.
3V or 2.
5V I/O supply Single WEN (READ/WRITE) control pin Positive clock-edge triggered, address, data, and control signal registers for fully pipelined applications Interleaved or linear four-word burst capability Individual byte write (BWa–BWd) c...

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