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MAX9450

Maxim Integrated Products
Part Number MAX9450
Manufacturer Maxim Integrated Products
Description High-Precision Clock Generators
Published Nov 21, 2006
Detailed Description www.DataSheet4U.com 19-0547; Rev 2; 9/06 High-Precision Clock Generators with Integrated VCXO General Description The ...
Datasheet PDF File MAX9450 PDF File

MAX9450
MAX9450

Overview
www.
DataSheet4U.
com 19-0547; Rev 2; 9/06 High-Precision Clock Generators with Integrated VCXO General Description The MAX9450/MAX9451/MAX9452 clock generators provide high-precision clocks for timing in SONET/SDH systems or Gigabit Ethernet systems.
The MAX9450/ MAX9451/MAX9452 can also provide clocks for the highspeed and high-resolution ADCs and DACs in 3G base stations.
Additionally, the devices can also be used as a jitter attenuator for generating high-precision CLK signals.
The MAX9450/MAX9451/MAX9452 feature an integrated VCXO.
This configuration eliminates the use of an external VCXO and provides a cost-effective solution for generating high-precision clocks.
The MAX9450/MAX9451/ MAX9452 feature two differential inputs and clock outputs.
The inputs accept LVPECL, LVDS, differential signals, and LVCMOS.
The input reference clocks range from 8kHz to 500MHz.
The MAX9450/MAX9451/MAX9452 offer LVPECL, HSTL, and LVDS outputs, respectively.
The output range is up to 160MHz, depending on the selection of crystal.
The input and output frequency selection is implemented through the I 2 C or SPI™ interface.
The MAX9450/ MAX9451/MAX9452 feature clock output jitter less than 0.
8ps RMS (in a 12kHz to 20MHz band) and phasenoise attenuation greater than -130dBc/Hz at 100kHz.
The phase-locked loop (PLL) filter can be set externally, and the filter bandwidth can vary from 1Hz to 20kHz.
The MAX9450/MAX9451/MAX9452 feature an input clock monitor with a hitless switch.
When a failure is detected at the selected reference clock, the device can switch to the other reference clock.
The reaction to the recovery of the failed reference clock can be revertive or nonrevertive.
If both reference clocks fail, the PLL retains its nominal frequency within a range of ±20ppm at +25°C.
The MAX9450/MAX9451/MAX9452 operate from 2.
4V to 3.
6V supply and are available in 32-pin TQFP packages with exposed pads.
Features ♦ Integrated VCXO Provides a Cost-Effective Solution for High-Precision Cloc...


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