DatasheetsPDF.com

MC74VHC74

ON Semiconductor
Part Number MC74VHC74
Manufacturer ON Semiconductor
Description Dual D-Type Flip-Flop
Published Apr 14, 2007
Detailed Description MC74VHC74 Dual D-Type Flip-Flop with Set and Reset The MC74VHC74 is an advanced high speed CMOS D−type flip−flop fabric...
Datasheet PDF File MC74VHC74 PDF File

MC74VHC74
MC74VHC74

Overview
MC74VHC74 Dual D-Type Flip-Flop with Set and Reset The MC74VHC74 is an advanced high speed CMOS D−type flip−flop fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.
The signal level applied to the D input is transferred to Q output during the positive going transition of the Clock pulse.
Reset (RD) and Set (SD) are independent of the Clock (CP) and are accomplished by setting the appropriate input Low.
The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output.
The inputs tolerate voltages up to 7.
0 V, allowing the interface of 5.
0 V systems to 3.
0 V systems.
Features • High Speed: fmax = 170MHz (Typ) at VCC = 5V • Low Power Dissipation: ICC = 2mA (Max) at TA = 25°C • High Noise Immunity: VNIH = VNIL = 28% VCC • Power Down Protection Provided on Inputs • Balanced Propagation Delays • Designed for 2.
0 V to 5.
5 V Operating Range • Low Noise: VOLP = 0.
8 V (Max) • Pin and Function Compatible with Other Standard Logic Families • Latchup Performance Exceeds 300 mA • ESD Performance: Human Body Model > 2000 V; Machine Model > 200 V • Chip Complexity: 128 FETs or 32 Equivalent Gates • NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable • These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant RD1 1 D1 2 3 CP1 SD1 4 5 Q1 6 Q1 13 RD2 D2 12 11 CP2 10 SD2 Figure 1.
LOGIC DIAGRAM 9 Q2 8 Q2 www.
onsemi.
com MARKING DIAGRAMS 14 1 SOIC−14 D SUFFIX CASE 751A 14 1 VHC74G AWLYWW 14 TSSOP−14 DT SUFFIX 1 CASE 948G VHC 74 ALYWG G 1 A = Assembly Location WL, L = Wafer Lot Y, YY = Year WW, W = Work Week G or G = Pb−Free Package (Note: Microdot may be in either location) FUNCTION TABLE Inputs Outputs SD RD CP D QQ LH HL LL HH HH HH HH HH XX HL XX LH X X H* H* H HL L LH L X No C...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)