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HI-8589

Holt Integrated Circuits
Part Number HI-8589
Manufacturer Holt Integrated Circuits
Description ARINC 429 LINE DRIVER AND DUAL RECEIVER
Published Jun 11, 2007
Detailed Description HI-8581, HI-8589 September 2006 ARINC 429 LINE DRIVER AND DUAL RECEIVER FEATURES ! ARINC specification 429 compliant ! ...
Datasheet PDF File HI-8589 PDF File

HI-8589
HI-8589

Overview
HI-8581, HI-8589 September 2006 ARINC 429 LINE DRIVER AND DUAL RECEIVER FEATURES ! ARINC specification 429 compliant ! Direct receiver and transmitter interface to ARINC bus in a single device ! 16-Bit parallel data bus ! Timing control 10 times the data rate ! Selectable data clocks ! Receiver error rejection per ARINC specification 429 ! Automatic transmitter data timing ! Self test mode ! Parity functions ! Low power ! Industrial & full military temperature ranges GENERAL DESCRIPTION The HI-8581 and HI-8589 from Holt Integrated Circuits are silicon gate CMOS devices for interfacing a 16-bit parallel data bus directly to the ARINC 429 serial bus.
Both devices provide two receivers, an independent transmitter and line driver capability in a single package.
The receiver input circuitry and logic are designed to meet the ARINC 429 specifications for loading, level detection, timing, and protocol.
The transmitter section provides the ARINC 429 communication protocol and the line driver circuits provide the ARINC 429 output levels.
The 16-bit parallel data bus exchanges the 32-bit ARINC data word in two steps when either loading the transmitter or interrogating the receivers.
The data bus interfaces with CMOS and TTL.
The HI-8581 has 37.
5 ohms in series with each line driver output.
The HI-8589 provides the option to bypass most of the internal output resistance so that external series www.
DataSheet4U.
com resistance may be added for lighting protection and still match the 75 ohm characteristic impedance of the ARINC bus.
Each independent receiver monitors the data stream with a sampling rate 10 times the data rate.
The sampling rate is software selectable at either 1MHz or 125KHz.
The results of a parity check are available as the 32nd ARINC bit.
The HI-8581 and HI-8589 examine the null and data timings and will reject erroneous patterns.
For example, with a 125 KHz clock selection, the data frequency must be between 10.
4 KHz and 15.
6 KHz.
The transmitter has a First...


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