DatasheetsPDF.com

LM2502

National Semiconductor
Part Number LM2502
Manufacturer National Semiconductor
Description Mobile Pixel Link (MPL) Display Interface Serializer/Deserializer
Published Aug 28, 2007
Detailed Description www.DataSheet4U.com August 2005 LM2502 Mobile Pixel Link (MPL) Display Interface Serializer and Deserializer LM2502 Mo...
Datasheet PDF File LM2502 PDF File

LM2502
LM2502

Overview
www.
DataSheet4U.
com August 2005 LM2502 Mobile Pixel Link (MPL) Display Interface Serializer and Deserializer LM2502 Mobile Pixel Link (MPL) Display Interface Serializer and Deserializer General Description The LM2502 device is a dual link display interface SERDES that adapts existing CPU / video busses to a low power current-mode serial MPL link.
The chipset may also be used for a RGB565 application with glue logic.
The interconnect is reduced from 22 signals to only 3 active signals with the LM2502 chipset easing flex interconnect design, size and cost.
The Master Serializer (SER) resides beside an application processor or baseband processor and translates a parallel bus from LVCMOS levels to serial MPL levels for transmission over a flex cable and PCB traces to the Slave Deserializer (DES) located near the display module.
Dual display support is provided for a primary and sub display through the use of two ChipSelect signals.
A Mode pin selects either a i80 or m68 style interface.
The Power_Down (PD*) input controls the power state of the MPL interface.
When PD* is asserted, the MD1/0 and MC signals are powered down to save current.
The LM2502 implements the physical layer of the MPL Standard (MPL-0).
The LM2502 is offered in NOPB (Lead-free) UFBGA and LLP packages.
Features n n n n n n n n n n n n > 300 Mbps Dual Link Raw Throughput MPL Physical Layer (MPL-0) Pin selectable Master / Slave mode Frequency Reference Transport Complete LVCMOS / MPL Translation Interface Modes: — 16-bit CPU, i80 or m68 style — RGB565 with glue logic −30˚C to 85˚C Operating Range Link power down mode reduces IDDZ < 10 µA Dual Display Support (CS1* & CS2*) Via-less MPL interconnect feature 3.
0V Supply Voltage (VDD and VDDA) Interfaces to 1.
7V to 3.
3V Logic (VDDIO) System Benefits n n n n n Small Interface Low Power Low EMI Frequency Reference Transport Intrinsic Level Translation Typical Application Diagram 20093301 Ordering Information NSID LM2502SM LM2502SQ Package Type 49 Le...


Similar Datasheet


@ 2014 :: Datasheetspdf.com :: Semiconductors datasheet search & download site. (Privacy Policy & Contact)