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ICS8402

Integrated Circuit Systems
Part Number ICS8402
Manufacturer Integrated Circuit Systems
Description CRYSTAL-TO LVCMOS/LVTTL FREQUENCY SYNTHESIZER
Published Jul 14, 2008
Detailed Description Integrated Circuit Systems, Inc. ICS8402 350MHZ, CRYSTAL-TO-LVCMOS / LVTTL FREQUENCY SYNTHESIZER FEATURES • 2 LVCMOS/LV...
Datasheet PDF File ICS8402 PDF File

ICS8402
ICS8402



Overview
Integrated Circuit Systems, Inc.
ICS8402 350MHZ, CRYSTAL-TO-LVCMOS / LVTTL FREQUENCY SYNTHESIZER FEATURES • 2 LVCMOS/LVTTL outputs • Selectable crystal oscillator interface or LVCMOS/LVTTL TEST_CLK • Output frequency range: 15.
625MHz to 350MHz • Crystal input frequency range: 12MHz to 40MHz • VCO range: 250MHz to 700MHz • Parallel or serial interface for programming counter and output dividers • RMS period jitter: 8ps (typical) • Cycle-to-cycle jitter: 40ps (typical) • Full 3.
3V or mixed 3.
3V core/2.
5V output supply voltage • 0°C to 70°C ambient operating temperature • Industrial temperature information available upon request GENERAL DESCRIPTION The ICS8402 is a general purpose, Crystal-toLVCMOS/LVTTL High Frequency Synthesizer and HiPerClockS™ a member of the HiPerClockS™ family of High Performance Clock Solutions from ICS.
The ICS8402 has a selectable TEST_CLK or crystal inputs.
The VCO operates at a frequency range of 250MHz to 700MHz.
The VCO frequency is programmed in steps equal to the value of the input reference or crystal frequency.
The VCO and output frequency can be programmed using the www.
DataSheet4U.
com serial or parallel interfaces to the configuration logic.
The low phase noise characteristics of the ICS8402 make it an ideal clock source for Gigabit Ethernet and SONET applications.
ICS BLOCK DIAGRAM OE0 OE1 VCO_SEL PIN ASSIGNMENT VCO_SEL nP_LOAD XTAL1 M4 32 31 30 29 28 27 26 25 XTAL_SEL TEST_CLK XTAL1 OSC XTAL2 1 0 M3 M2 M1 M0 M5 M6 M7 M8 N0 N1 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 24 23 22 XTAL2 TEST_CLK XTAL_SEL VDDA S_LOAD S_DATA S_CLOCK MR ICS8402 21 20 19 18 17 PLL PHASE DETECTOR MR nc GND ÷2 ÷4 ÷8 ÷16 VCO ÷M 0 1 TEST VDD OE1 OE0 VDDO Q1 Q0 GND Q0 Q1 S_LOAD S_DATA S_CLOCK nP_LOAD M0:M8 N0:N1 CONFIGURATION INTERFACE LOGIC TEST 32-Lead LQFP 7mm x 7mm x 1.
4mm package body Y Package Top View 32-Lead VFQFN 5mm x 5mm x 0.
75mm package body K Package Top View 8402AY www.
icst.
com/products/hiperclocks.
html 1 REV.
B O...



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