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DPAD

Linear Integrated Systems
Part Number DPAD
Manufacturer Linear Integrated Systems
Description MONOLITHIC DUAL PICO AMPERE DIODES
Published Dec 1, 2008
Detailed Description DPAD SERIES Linear Integrated Systems FEATURES MONOLITHIC DUAL PICO AMPERE DIODES Direct Replacement For SILICONIX DPA...
Datasheet PDF File DPAD PDF File

DPAD
DPAD

Overview
DPAD SERIES Linear Integrated Systems FEATURES MONOLITHIC DUAL PICO AMPERE DIODES Direct Replacement For SILICONIX DPAD SERIES HIGH ON ISOLATION 20fA EXCELLENT CAPACITANCE MATCHING ABSOLUTE MAXIMUM RATINGS1 @ 25 °C (unless otherwise stated) www.
DataSheet4U.
com Maximum Temperatures Storage Temperature Operating Junction Temperature Maximum Power Dissipation Continuous Power Dissipation (DPAD) Maximum Currents Forward Current (DPAD) 50mA 500mW -65 to +150 °C -55 to +135 °C K1 DPAD TO-72 BOTTOM VIEW A1 3 5 DPAD1 TO-78 BOTTOM VIEW C A1 4 3 5 ∆CR ≤ 0.
2pF A2 K2 1 7 K2 K1 1 7 A2 SSTDPAD SOIC K1 K1 A1 NC 1 2 3 4 8 7 6 5 K2 K2 A2 NC COMMON ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL BVR VF |CR1-CR2| CHARACTERISTIC Reverse Breakdown Voltage Forward Voltage Differential Capacitance (∆CR) Total Reverse Capacitance DPAD1 ALL OTHERS DPAD1 Crss DPAD2,5,10,20,50,100 SSTDPAD5,50,100 SPECIFIC ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL CHARACTERISTIC (SST)DPAD1 (SST)DPAD2 (SST)DPAD5 IR Maximum Reverse 2 Leakage Current (SST)DPAD10 (SST)DPAD20 (SST)DPAD50 (SST)DPAD100 DPAD2 -1 -2 -5 -10 -20 -50 -100 -50 -100 -5 pA VR = -20V SSTDPAD2 UNITS CONDITIONS DPAD1 DPAD2,5,10,20,50,100 SSTDPAD5,50,100 MIN -45 -45 -30 0.
8 1.
5 0.
2 0.
5 0.
8 2.
0 4.
0 pF VR = -5V, f = 1MHz V IR = -1µA IF = 1mA VR1 = VR2 = -5V, f = 1MHz TYP MAX UNITS CONDITIONS Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Figure 1.
Operational Amplifier Protection Input Differential Voltage limited to 0.
8V (typ) by DPADs D1 and D2.
Common Mode Input voltage limited by DPADs D3 and D4 to ±15V.
Figure 2.
Sample and Hold Circuit Typical Sample and Hold circuit with clipping.
DPAD diodes reduce offset voltages fed capacitively from the JFET switch gate.
FIGURE 1 DPAD10 D1 D3 D2 D4 OP-27 + www.
DataSheet4U.
com FIGURE 2 +V DPAD1 D1 -V D2 2N4117A 2N4393 C R VOUT +V ein +15V -15V CONTROL SIGNAL TO-72 Four Lead 0...


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