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AD6659

Analog Devices
Part Number AD6659
Manufacturer Analog Devices
Description Dual IF Receiver
Published Mar 10, 2010
Detailed Description Dual IF Receiver AD6659 FEATURES FUNCTIONAL BLOCK DIAGRAM 12-bit, 80 MSPS output data rate per channel AVDD AGND SD...
Datasheet PDF File AD6659 PDF File

AD6659
AD6659

Overview
Dual IF Receiver AD6659 FEATURES FUNCTIONAL BLOCK DIAGRAM 12-bit, 80 MSPS output data rate per channel AVDD AGND SDIO SCLK CSB 1.
8 V analog supply operation (AVDD) SPI CMOS OUTPUT BUFFER 1.
8 V to 3.
3 V output supply (DRVDD) Integrated noise shaping requantizer (NSR) PROGRAMMING DATA ORA Integrated quadrature error correction (QEC) Performance with NSR enabled SNR = 81 dBFS in 16 MHz band up to 30 MHz at 80 MSPS Performance with NSR disabled SNR = 72 dBFS up to 70 MHz at 80 MSPS SFDR = 90 dBc up to 70 MHz input at 80 MSPS E Low power: 98 mW per channel at 80 MSPS Differential input with 700 MHz bandwidth On-chip voltage reference and sample-and-hold circuit 2 V p-p differential analog input T Serial port control options Offset binary, gray code, or twos complement data format Optional clock duty cycle stabilizer E Integer 1-to-6 input clock divider Data output multiplex option Built-in selectable digital test pattern generation Energy-saving power-down modes L Data clock out...


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