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HT45R35

Holtek Semiconductor
Part Number HT45R35
Manufacturer Holtek Semiconductor
Description C/R to F Type 8-Bit OTP MCU
Published Jul 16, 2010
Detailed Description www.DataSheet4U.com HT45R35 C/R to F Type 8-Bit OTP MCU Features · Operating voltage: · Power Down and Wake-up function...
Datasheet PDF File HT45R35 PDF File

HT45R35
HT45R35

Overview
www.
DataSheet4U.
com HT45R35 C/R to F Type 8-Bit OTP MCU Features · Operating voltage: · Power Down and Wake-up function reduce power fSYS=4MHz: 2.
2V~5.
5V fSYS=8MHz: 3.
3V~5.
5V · 16 bidirectional I/O lines · Two external interrupt inputs shared with I/O lines · 8-bit programmable timer/event counter with consumption · Up to 0.
5ms instruction cycle with 8MHz system clock at VDD=5V · All instructions executed in one or two machine cycles · 14-bit table read instruction · Four-level subroutine nesting · Bit manipulation instruction · 63 powerful instructions · Low voltage reset function · 16-pin DIP/NSOP, 20-pin DIP/SOP, overflow interrupt and 7-stage prescaler · External RC oscillation converter · On-chip crystal and RC oscillator · Watchdog Timer · 12 capacitor/resistor sensor input · 2048´14 program memory · 120´8 data memory RAM 24/28-pin SKDIP/SOP/SSOP and 32-pin QFN packages General Description The HT45R35 is an 8-bit high performance, RISC architecture microcontroller device specifically designed for cost-effective multiple I/O control product applications.
The advantages of low power consumption, I/O flexibility, timer functions, oscillator options, Power Down and wake-up functions, Watchdog Timer, enhance the versatility of these devices to suit a wide range of application possibilities such as industrial control, consumer products, subsystem controllers, etc.
Rev.
1.
30 1 May 14, 2010 www.
DataSheet4U.
com HT45R35 Block Diagram P A 0 /IN T 0 /R C 1 P A 1 /IN T 1 /R C 2 S T A C K 0 P ro g ra m R O M P ro g ra m C o u n te r S T A C K 1 In te rru p t C ir c u it IN T C T M R C T M R M U X P r e s c a le r S y s te m C lo c k P A 2 /T M R /R C 3 W D T S In s tr u c tio n R e g is te r M P M U X D a ta M e m o ry W D T P r e s c a le r W D T M U X S y s te m C lo c k /4 P A C P A P O R T A In s tr u c tio n D e c o d e r A L U T im in g G e n e ra to r M U X P A 0 P A 1 P A 2 P A 3 P A 5 P A 7 /IN /IN /T /R /R /R T 0 /R T 1 /R M R /R C 4 , ...


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