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AD9645

Analog Devices
Part Number AD9645
Manufacturer Analog Devices
Description 1.8V Analog-to-Digital Converter
Published Oct 6, 2013
Detailed Description Data Sheet Dual, 14-Bit, 80 MSPS/125 MSPS, Serial LVDS 1.8 V Analog-to-Digital Converter AD9645 FEATURES 1.8 V supply ...
Datasheet PDF File AD9645 PDF File

AD9645
AD9645

Overview
Data Sheet Dual, 14-Bit, 80 MSPS/125 MSPS, Serial LVDS 1.
8 V Analog-to-Digital Converter AD9645 FEATURES 1.
8 V supply operation Low power: 122 mW per channel at 125 MSPS with scalable power options SNR = 74 dBFS (to Nyquist) SFDR = 91 dBc at 70 MHz DNL = ±0.
65 LSB (typical); INL = ±1.
5 LSB (typical) Serial LVDS (ANSI-644, default) and low power, reduced range option (similar to IEEE 1596.
3) 650 MHz full power analog bandwidth 2 V p-p input voltage range Serial port control Full chip and individual channel power-down modes Flexible bit orientation Built-in and custom digital test pattern generation Clock divider Programmable output clock and data alignment Programmable output resolution Standby mode APPLICATIONS Communications Diversity radio systems Multimode digital receivers GSM, EDGE, W-CDMA, LTE, CDMA2000, WiMAX, TD-SCDMA I/Q demodulation systems Smart antenna systems Broadband data applications Battery-powered instruments Handheld scope meters Portable medical imaging and ultrasound Radar/LIDAR GENERAL DESCRIPTION The AD9645 is a dual, 14-bit, 80 MSPS/125 MSPS analog-todigital converter (ADC) with an on-chip sample-and-hold circuit designed for low cost, low power, small size, and ease of use.
The product operates at a conversion rate of up to 125 MSPS and is optimized for outstanding dynamic performance and low power in applications where a small package size is critical.
The ADC requires a single 1.
8 V power supply and LVPECL-/ CMOS-/LVDS-compatible sample rate clock for full performance operation.
No external reference or driver components are required for many applications.
PLL, SERIALIZER AND DDR LVDS DRIVERS 10537-001 FUNCTIONAL BLOCK DIAGRAM AVDD AGND DRVDD VINA+ VINA– VCM VINB+ VINB– AD9645 14-BIT PIPELINE ADC 14 14 14-BIT PIPELINE ADC 14 14 REFERENCE D0A+ D0A– D1A+ D1A– D0B+ D0B– D1B+ D1B– DCO+ DCO– FCO+ FCO– SERIAL PORT INTERFACE 1 TO 8 CLOCK DIVIDER SCLK/ SDIO/ CSB DFS PDWN CLK+ CLK– Figure 1.
The ADC automatically multiplies the ...


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